High Performance LNAs and Mixers for Direct Conversion Receivers in BiCMOS and CMOS Technologies

The trend in cellular chipset design today is to incorporate support for a larger number of frequency bands for each new chipset generation. If the chipset also supports receiver diversity two low noise amplifiers (LNAs) are required for each frequency band. This is however associated with an increase of off-chip components, i.e. matching components for the LNA inputs, as well as complex routing of the RF input signals. If balanced LNAs are implemented the routing complexity is further increased. The first presented work in this thesis is a novel multiband low noise single ended LNA and mixer architecture. The mixer has a novel feedback loop suppressing both second order distortion as well as DC-offset. The performance, verified by Monte Carlo simulations, is sufficient for a WCDMA application. The second presented work is a single ended multiband LNA with programmable integrated matching. The LNA is connected to an on-chip tunable balun generating differential RF signals for a differential mixer. The combination of the narrow band input matching and narrow band balun of the presented LNA is beneficial for suppressing third harmonic downconversion of a WLAN interferer. The single ended architecture has great advantages regarding PCB routing of the RF input signals but is on the other hand more sensitive to common mode interferers, e.g. ground, supply and substrate noise. An analysis of direct conversion receiver requirements is presented together with an overview of different LNA and mixer architectures in both BiCMOS and CMOS technology

A BiCMOS single ended multiband RF-amplifier and mixer with DC-offset and second order distortion suppression

Direct conversion receivers are widely used for full duplex mobile radio communication systems. This paper describes a novel SAW-less single-ended RF amplifier connected to a single-ended mixer with a feedback loop that suppresses the second-order distortion from TX cross modulation of the LO-leakage as well as DC-offset at the mixer output. In Monte Carlo simulations the design achieves +47 dBm minimum IIP2 with 32 dB conversion voltage gain. The advantage with the proposed architecture is that it is fully single-ended. Especially in multiband integrated radios this is highly desirable since the pin-count for the LNAs is reduced by half. The PCB routing of the RF input signal is simplified. The design requires two off-chip filter capacitors of non critical value intended to be placed on the laminate inside the package

Integrated Transceivers for Millimeter Wave and Cellular Communication

Abstract:This doctoral thesis is addresses two topics in integrated circuit design: multiband direct conversion cellular receivers for cellular frequencies and beam steering transmitters for millimeter wave communication for the cellular backhaul. The trend towards cellular terminals supporting ever more different frequency bands has resulted in complex radio frontends with a large number of RF inputs. Common receivers have, for performance reasons, in the past used differential RF inputs. However, as shown in the thesis, with novel design techniques it is possible to achieve adequate performance with a single ended frontend architecture, thereby reducing the complexity and pin-count. Millimeter wave integrated circuits development has previously not been subject to the mass production requirements that have been put on chip sets for cellular terminals, i.e. a minimum number of circuits, low supply voltage and power consumption, together with programmability to handle process spread and performance fine tuning. However, in the near future, when 5G networks will be deployed and the number of small pico- and femtocell base stations will explode, there will be a strong demand for low cost and high performance single-chip millimeter wave beam steering transceivers. The millimeter wave circuits presented in this work have been designed in a SiGe bipolar technology. Traditionally, SiGe designs use a higher supply voltage compared to CMOS. In this work, however, it has been shown that millimeter wave transceivers can be designed using a low supply voltage, thereby reducing the power consumption and eliminating the need for dedicated voltage regulators.Paper I presents a 28 GHz QVCO with an I/Q phase error tuning and detection. In paper II a 28 GHz beam steering PLL is presented together with measurement results for the design in paper I. Measurement results for the beam steering PLL are shown in paper III. Simulation results for a two-stage 81-86 GHz power amplifier are provided in paper IV. Paper V shows measurement results for two E-band power amplifiers. In paper VI, simulation results are presented for a complete E-band transmitter including a three-stage power amplifier. A reconfigurable single-ended CMOS LNA for different cellular frequency bands is presented in paper VII. A single-ended multiband RF-amplifier and mixer with DC-offset and second order distortion suppression in BiCMOS technology is presented in paper VIII

A broadband SiGe Power Amplifier for E-band communication applications

This work presents a broadband SiGe Power Amplifier (PA) for operation between 60-90 GHz covering both 71-76 GHz and 81-86 GHz E-Band sub-bands. It consists of a two-stage differential cascode amplifier using an LC-interstage matching network in the interface between the stages. Single-ended to differential conversion is accomplished by the use of two stacked 1-To-1 transformers, achieving a simulated insertion loss of 0.63 dB and 0.45 dB at input and output, respectively. The design has been implemented using Infineon B7HF200 0.18 pm SiGe HBT process with fp/fmax 200/250 GHz. Measured performance indicates that the PA delivers 12.6 dBm saturated output power (Psat) with 4.6% peak Power Added Efficiency (PAE) at 84 GHz while providing at least 6 dB of gain covering a frequency range from 62 to 90 GHz. The circuit consumes 102 mA from a 2.8 V power supply and occupies an area of 0.105 mm2

A 28 GHz SiGe QVCO with an I/Q phase error detector for an 81-86 E-band transceiver

This paper presents a 28 GHz QVCO intended to be used in an 81-86 GHz E-band transceiver. E-band transceivers using e.g. 16 QAM modulation schemes are sensitive to I/Q phase error. Already a three degree error significantly degrades the bit error rate, and careful control of the phase error of the 28 GHz QVCO is therefore required. In the presented design the phase error can be tuned using four varactors, each connected to one of the QVCO outputs. The phase error is detected in two cross-coupled active mixers, creating a DC-level proportional to the phase error. The accuracy of the detector has been verified by Monte Carlo simulations showing a 3 sigma phase error of one degree. The QVCO is designed in a SiGe process with f T = 200 GHz. The current consumption is 14 mA from a 1.5 V supply and 57 mA from a 2.5 V supply. The 2.5 V supply is dedicated to the detector and output buffers. At 1 MHz offset the phase noise equals -105 dBc/Hz with a FOM of -181 dBc/Hz and a FOM T of -186 dBc/Hz. The die area equals 1.3 mm 2

A 1V SiGe Power Amplifier for 81-86 GHz E-band

This paper presents an architecture for a SiGe E-band power amplifier using a stacked transformers for output power combination. According to simulations, at E-band frequencies, the power combiner consisting of two individual single turn transformers performs significantly better compared to a single common 2:1 transformer with two turns on the secondary side. The power combination allows for a low supply voltage of 1 V, which is beneficial since the supply can be shared between the power amplifier and the transceiver thereby eliminating the need of a separate voltage regulator. To improve the gain of the two-stage amplifier it employs a capacitive cross-coupling technique not yet seen in mm-wave SiGe PAs. The PA is designed in a SiGe process with fr = 200 GHz and achieves a power gain of 12dB, a saturated output power of 16dBm and a 14% peak PAE

A 1V power amplifier for 81-86 GHz E-band

The design and layout of a two stage SiGe E-band power amplifier using a stacked transformer for output power combination is presented. In EM-simulations with ADS Momentum, at E-band frequencies, the power combiner consisting of two individual single turn transformers performs significantly better than a single 2:1 transformer with two turns on the secondary side. Imbalances in the stacked transformer structure are reduced with tuning capacitors for maximum gain and output power. At 84 GHz the simulated loss of the stacked transformer is as low as 1.35 dB, superseding the performance of an also presented alternative power combiner. The power combination allows for a low supply voltage of 1 V, which is beneficial since the supply can then be shared between the power amplifier and the transceiver, thereby eliminating the need of a separate voltage regulator. To improve the gain of the two-stage amplifier it employs a capacitive cross-coupling technique not yet seen in mm-wave SiGe PAs. Capacitive cross-coupling is an effective technique for gain enhancement but is also sensitive to process variations as shown by Monte Carlo simulations. To mitigate this two alternative designs are presented with the cross coupling capacitors implemented either with diode coupled transistors or with varactors. The PA is designed in a SiGe process with f T = 200 GHz and achieves a power gain of 12 dB, a saturated output power of 16 dBm and a 14 % peak PAE. Excluding decoupling capacitors it occupies a die area of 0.034 mm2

Comparison of two SiGe 2-stage E-band Power Amplifier Architectures

This paper presents simulation and measurement results for two 2-stage E-band power amplifiers implemented in 0.18um SiGe technology with fT = 200 GHz. To increase the power gain by mitigating the effect of the base-collector capacitance, the first design uses a differential cascode topology with a 2.7 V supply voltage. The second design instead uses capacitive cross-coupling of a differential common emitter stage, previously not demonstrated in mm-wave SiGe PAs, and has a supply voltage of only 1.5V. Low supply voltage is advantageous since a common supply can then be shared between the transceiver and the PA. To maximize the power gain and robustness, both designs use a transformer based interstage matching. The cascode design achieves a measured power gain, S21 , of 16 dB at 92 GHz with 17GHz 3-dB bandwidth, and a simulated saturated output power, Psat , of 17 dBm with a 16% peak PAE. The cross-coupled design achieves a measured S21 of 10 dB at 93 GHz with 16 GHz 3-dB bandwidth, and a simulated Psat, of 15 dBm with 16% peak PAE. Comparing the measured and simulated results for the two amplifier architectures, the cascode topology is more robust, while the cross-coupled topology would benefit from a programmable cross-coupling capacitance

System simulations of a 1.5 V SiGe 81-86 GHz E-band transmitter

This paper presents simulation results for a sliding-IF SiGe E-band transmitter circuit for the 81-86 GHz E-band. The circuit was designed in a SiGe process with fT = 200 GHz and uses a supply of 1.5 V. The low supply voltage eliminates the need for a dedicated transmitter voltage regulator. The carrier generation is based on a 28 GHz quadrature voltage oscillator (QVCO). Upconversion to 84 GHz is performed by first mixing with the QVCO signals, converting the signal from baseband to 28 GHz, and then mixing it with the 56 GHz QVCO second harmonic, present at the emitter nodes of the QVCO core devices. The second mixer is connected to a three-stage power amplifier utilizing capacitive cross-coupling to increase the gain, providing a saturated output power of +14 dBm with a 1 dB output compression point of +11 dBm. E-band radio links using higher order modulation, e.g. 64 QAM, are sensitive to I/Q phase errors. The presented design is based on a 28 GHz QVCO, the lower frequency reducing the phase error due to mismatch in active and passive devices. The I/Q mismatch can be further reduced by adjusting varactors connected to each QVCO output. The analog performance of the transmitter is based on ADS Momentum models of all inductors and transformers, and layout parasitic extracted views of the active parts. For the simulations with a 16 QAM modulated baseband input signal, however, the Momentum models were replaced with lumped equivalent models to ease simulator convergence. Constellation diagrams and error vector magnitude (EVM) were calculated in MATLAB using data from transient simulations. The EVM dependency on QVCO phase noise, I/Q imbalance and PA compression has been analyzed. For an average output power of 7.5 dBm, the design achieves 7.2% EVM for a 16 QAM signal with 1 GHz bandwidth. The current consumption of the transmitter, including the PA, equals 131 mA from a 1.5 V supply